Document Outline

• Revision History
• Table of Contents
• Z8® CPU Product Overview
  • Key Features
  • Product Development Support
• Address Space
  • Introduction
  • Z8® CPU Standard Register File
    • General-Purpose Registers
    • RAM Protect
    • Working Register Groups
    • Error Conditions
  • Z8 Expanded Register File
  • Z8® Control and Peripheral Registers
    • Standard Z8 Registers
    • Expanded Z8 Registers
  • Program Memory
  • Z8® External Memory
    • External Data Memory
  • Z8® Stacks
• Clock
  • Frequency Control
  • Clock Control
    • SCLK ÷ TCLK Divide-By-16 Select
    • External Clock Divide-By-Two
  • Oscillator Control
  • Oscillator Operation
    • Layout
    • Indications of an Unreliable Design
    • Circuit Board Design Rules
    • Crystals and Resonators
  • LC Oscillator
  • RC Oscillator
• Reset
  • Reset Pin, Internal POR Operation
• Watchdog Timer
  • Power-On Reset
• Input/Output Ports
  • Mode Registers
  • Input and Output Registers
  • Port 0
    • General I/O Mode
    • Read/Write Operations
    • Handshake Operation
  • Port 1
    • General I/O Mode
    • Read/Write Operations
    • Handshake Operations
  • Port 2
    • General Port I/O
    • Read/Write Operations
    • Handshake Operation
  • Port 3
    • General Port I/O
    • Read/Write Operations
    • Special Functions
  • Port Handshake
  • I/O Port Reset Conditions
    • Full Reset
  • Analog Comparators
    • Comparator Description
    • Comparator Programming
    • Comparator Operation
    • Interrupts
    • Comparator Definitions
    • Run Mode
    • Halt Mode
    • Stop Mode
  • Open-Drain Configuration
  • Low EMI Emission
  • Input Protection
  • Z8® CMOS Autolatches
    • Autolatch Model
    • Design Considerations
• Counters and Timers
  • Prescalers and Counter/Timers
  • Counter/Timer Operation
    • Load and Enable Count Bits
    • Prescaler Operations
  • TOUT Modes
  • TIN Modes
    • External Clock Input Mode
    • Gated Internal Clock Mode
    • Triggered Input Mode
    • Retriggerable Input Mode
  • Cascading Counter/Timers
  • Reset Conditions
• Interrupts
  • Interrupt Sources
    • External Interrupt Sources
    • Internal Interrupt Sources
  • Interrupt Request Register Logic and Timing
  • Interrupt Initialization
    • Interrupt Priority Register Initialization
    • Interrupt Mask Register Initialization
    • Interrupt Request Register Initialization
  • IRQ Software Interrupt Generation
  • Vectored Processing
    • Vectored Interrupt Cycle Timing
    • Nesting of Vectored Interrupts
  • Polled Processing
  • Reset Conditions
• Power-Down Modes
  • Halt Mode Operation
  • Stop Mode Operation
  • Stop Mode Recovery Register
• Serial Input/Output
  • UART Introduction
  • UART Bit-Rate Generation
  • UART Receiver Operation
    • Receiver Shift Register
    • Overwrites
    • Framing Errors
    • Parity
  • Transmitter Operation
    • Overwrites
    • Parity
  • UART Reset Conditions
  • Serial Peripheral Interface
  • SPI Operation
  • SPI Compare
  • SPI Clock
  • Receive Character Available and Overrun
• External Interface
  • Introduction
  • Pin Descriptions
  • External Addressing Configuration
  • External Stacks
  • Data Memory
  • Bus Operation
    • Address Strobe
    • Data Strobe
  • Extended Bus Timing
  • Instruction Timing
  • Z8® Reset Conditions
• Instruction Set
  • Processor Flags
    • Carry Flag
    • Zero Flag
    • Sign Flag
    • Overflow Flag
    • Decimal Adjust Flag
    • Half Carry Flag
  • Condition Codes
  • Notation and Binary Encoding
    • Assembly Language Syntax
  • Z8® Instruction Summary
    • Op Code Map
• Instruction Description
  • Add
  • Add With Carry
  • Call Procedure
  • Complement Carry Flag
  • Clear
  • Complement
  • Compare
  • Decimal Adjust
  • Decrement
  • Decrement and Jump if Non-Zero
  • Decrement Word
  • Disable Interrupts
  • Enable Interrupts
  • Halt
  • Increment
  • Increment Word
  • Interrupt Return
  • Jump
  • Jump Relative
  • Load
  • Load Constant
  • Load Constant Autoincrement
  • Load External Data
  • Load External Data Autoincrement
  • No Operation
  • Logical AND
  • Logical OR
  • Logical Exclusive OR
  • POP
  • PUSH
  • Reset Carry Flag
  • Return
  • Rotate Left
  • Rotate Left Through Carry
  • Rotate Right
  • Rotate Right Through Carry
  • Set Carry Flag
  • Set Register Pointer
  • Shift Right Arithmetic
  • STOP
  • Subtract
  • Subtract With Carry
  • Swap Nibbles
  • Test Complement Under Mask
  • Test Under Mask
  • Watchdog Timer
  • Watchdog Timer Enable During Halt Mode
• Index
• Customer Support