Document Outline

• Contents
  • 1. Introduction
  • 1.1 Features
  • 1.2 Installation Guide
  • 1.3 Software
  • 1.4 Accessories
  • 2. Installation
  • 2.1 Unpacking
  • 2.2 Driver Installation
  • 2.3 Hardware Installation
  • 2.4 Device Setup & Configuration
  • 2.5 Device Testing
  • 3. Signal Connections
  • 3.1 Overview
  • 3.2 I/O Connector
  • 3.3 Analog Input Connections
  • 3.4 Analog Output Connections
  • 3.5 Trigger Source Connections
  • 3.6 Field Wiring Considerations
  • 4. Software Overview
  • 4.1 Programming Choices
  • 4.2 DLL Driver Programming Roadmap
  • 5. Calibration
  • 5.1 PCI-1710/1710L/1710HG/1710HGL Calibration
  • 5.2 PCI-1711/1711L Calibration
  • 5.3 PCI-1716/1716L Calibration
  • Appendix A. Specifications
  • Appendix B. Block Diagram
  • C. Register Structure and Format
  • C.1 Overview
  • C.2 I/O Port Address Map
  • C.3 Channel Number and A/D Data - BASE+0 and BASE+1
  • C.4 Software A/D Trigger - BASE+0
  • C.5 A/D Channel Range Setting - BASE+2
  • C.6 MUX Control - BASE+4 and BASE+5
  • C.7 Control Register - BASE+6
  • C.8 Status Register - BASE+6 and BASE+7
  • C.9 Clear Interrupt and FIFO - BASE+8 and BASE+9
  • C.10 D/A Output Channel 0 - BASE+10 and BASE+11
  • C.11 D/A Output Channel 0 - BASE+10 and BASE+11
  • C.12 D/A Output Channel 1 - BASE+12 and BASE+13
  • C.13 D/A Output Channel 1 - BASE+12 and BASE+13
  • C.14 D/A Reference Control -BASE+14
  • C.15 Digital I/O Registers - BASE+16 and BASE+17
  • C.16 Calibration Registers - BASE+18 and BASE+19
  • C.17 Board ID Registers - BASE+20
  • C.18 Programmable Timer/Counter Registers BASE+24, BASE+26, BASE+28 and BASE+30
  • Appendix D. 82C54 Counter Function
  • D.1 The Intel 82C54
  • D.2 Counter Read/Write and Control Registers
  • D.3 Counter Operating Modes
  • D.4 Counter Operations
  • Appendix E. PCI-1716/1716L Calibration (Manually)
  • E.1 A/D Calibration
  • E.2 D/A Calibration (for PCI-1716 only)
  • Appendix
  • F. Screw-terminal Bord
  • F.1 Introduction
  • F.2 Features
  • F.3 Applications
  • F.4 Board Layout
  • F.5 Pin Assignment
  • F.6 Technical Diagram
• Figures
  • Figure 1-1: Installation Flow Chart
  • Figure 2-1: The Setup Screen of Advantech Automation Software
  • Figure 2-2: Different options for Driver Setup
  • Figure 2-3: The device name listed on the Device Manager
  • Figure 2-4: The Advantech Device Installation utility program
  • Figure 2-5: The I/O Device Installation dialog box
  • Figure 2-6: The "Device(s) Found" dialog box
  • Figure 2-7: The Device Setting dialog box
  • Figure 2-8: The Device Name appearing on the list of devices box
  • Figure 2-9: Analog Input tab on the Device Test dialog box
  • Figure 2-10: Analog Input tab on the Device Test dialog box
  • Figure 2-11: Analog Output tab on the Device Test dialog box
  • Figure 2-13: Digital Output tab on the Device Test dialog box
  • Figure 2-12: Digital Input tab on the Device Test dialog box
  • Figure 2-14: Counter tab on the Device Test dialog box
  • Figure 3-1: I/O connector pin assignments for the PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L
  • Figure 3-2: Single-ended input channel connection
  • Figure 3-3: Differential input channel connection - ground reference signal source
  • Figure 3-4: Differential input channel connection - floating signal source
  • Figure 3-5: Analog output connections
  • Figure 5-1: PCI-1710/1710L/1710HG/1710HGL VR assignment
  • Figure 5-2: PCI-1711/1711L VR assignment
  • Figure 5-3: PCI-1716/1716L VR assignment
  • Figure 5-4: Selecting the device you want to calibrate
  • Figure 5-5: Warning message before start calibration
  • Figure 5-6: Auto A/D Calibration Dialog Box
  • Figure 5-7: A/D Calibration Procedure 1
  • Figure 5-8: A/D Calibration Procedure 2
  • Figure 5-9: A/D Calibration Procedure 3
  • Figure 5-11: Range Selection in D/A Calibration
  • Figure 5-10: A/D Calibration is finished
  • Figure 5-12: Calibrating D/A Channel 0
  • Figure 5-13: Calibrating D/A Channel 1
  • Figure 5-14: D/A Calibration is finished
  • Figure 5-15: Selecting Input Rage in Manual A/D Calibration panel
  • Figure 5-16: Adjusting registers
  • Figure 5-17 & Figure 5-18: Selecting D/A Range and Choosing Output Voltage
  • Figure 5-19: Adjusting registers
• Tables
  • Table 3-1: I/O Connector Signal Description
  • Table C-1: PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L register format (Part 3)
  • Table C-1: PCI-1710/1710L/1710HG/1710HGL/1711/1711L register format (Part 4)
  • Table C-1: PCI-1716/1716L register format (Part 5)
  • Table C-1: PCI-1710/1710L/1710HG/1710HGL/1711/1711L/1716/1716L register format (Part 6)
  • Table C-3: PCI-1716/1716L Register for A/D data
  • Table C-2: PCI-1710/1710L/1710HG/1710HGL/1711/1711L Register for channel number and A/D data
  • Table C-4: Register for A/D channel range setting
  • Table C-5: Gain codes for PCI-1710/1710L
  • Table C-6: Gain codes for PCI-1710HG/1710HGL
  • Table C-7: Gain codes for PCI-1711/1711L
  • Table C-8: Register for multiplexer control
  • Table C-9: Control Register
  • Table C-10: Status Register
  • Table C-11: Register to clear interrupt and FIFO
  • Table C-12: Register for load D/A channel 0 data
  • Table C-13: Register for D/A channel 0 data
  • Table C-14: Register for load D/A channel 1 data
  • Table C-15: Register for D/A channel 1 data
  • Table C-16: PCI-1710/1710HG/1711 Register for D/A reference control
  • Table C-17: PCI-1716 Register for D/A reference control
  • Table C-18: Register for digital input
  • Table C-19: Register for digital output
  • Table C-20: Calibration Command and Data Register
  • Table C-21: Calibration Command and Data Register
  • Table C-22: Register for Board ID
  • Table E-2: D/A binary code table